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 512 K x 32 FLASH Module
PUMA68FV16006X - 70/90/12
Issue 5.0 April 2001
Description
The PUMA68 range of devices provide a high density surface mount industry standard memory solution which may accommodate various memory technologies including SRAM, EEPROM and Flash. The devices are designed to offer a defined upgrade path and may be user configured as 8, 16 or 32 bits wide. The PUMA68FV16006X is a 512Kx32 FLASH module housed in a 68 Jleaded package which complies with the JEDEC 68 PLCC standard. Access times of 70, 90 or 120ns are available. The 3.3V device is available to commercial and industrial temperature grade. 1M x 32, and 2Mx32 FLASH PUMA68 devices are available in the same footprint to offer a defined upgrade path.
Block Diagram
A0~A18 /OE /WE 512K x 8 FLASH /CS1 /CS2 /CS3 /CS4 D0~7 D8~15 D16~23 D24~31 512K x 8 FLASH 512K x 8 FLASH 512K x 8 FLASH
Features
* Access times of 70, 90 and 120ns. * 3.3V + 10%. * Commercial and Industrial temperature grades * JEDEC Standard 68 PLCC footprint. * Industry standard pinout. * May be organised as 512Kx32, 1Mx16 or 2Mx8 * User configurable as 8 / 16 / 32 bits wide. * 10 Year Data Retention * Write Erase Cycle Endurance 100,000 (min) * Automatic Write/Erase by Embedded Algorithm * Uniform Sector Device.
Pin Definition See page 2.
Pin Functions
Description Address Input Data Input/Output Chip Select Write Enable Output Enable No Connect Power Ground Signal A0~A18 D0~D31 /CS1~4 /WE /OE NC VCC VSS
Package Details
Plastic `J' Leaded JEDEC PLCC Max. Dimensions (mm) - 25.27 x 25.27 x 5.08
Pin Definition - PUMA68F16006X
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
Signal VCC NC /CS1 /CS2 /CS3 /CS4 A17 A18 D16 D17 D18 D19 VSS D20 D21 D22 D23 VCC D24 D25 D26 D27 VSS D28 D29 D30 D31 A6 A5 A4 A3 A2 A1 A0
Pin 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
Signal VCC A13 A12 A11 A10 A9 A8 A7 D0 D1 D2 D3 VSS D4 D5 D6 D7 VCC D8 D9 D10 D11 VSS D12 D13 D14 D15 A14 A15 A16 /WE /OE NC NC
PAGE 2
Issue 5.0 April 2001
Package Details
PUMA 68 pin JEDEC Surface Mounted PLCC
Pin 1
Pin 68
25.27 (0.995) 25.02 (0.985) 5.08 (0.200) max
0.46 (0.018)
1.27 (0.050)
0.90 (0.035) typ
23.11 (0.910) 24.13 (0.950)
PAGE 3
Issue 5.0 April 2001
Ordering Information
Ordering Information
PUMA 68.V16006XI - 70
Speed 70 90 12 Blank I = = = = = 70ns 90ns 120ns Commercial Industrial
Temp. Range/Screening Pinout Configuration Memory Organisation
X = Industry Standard Pinout 16006 = configurable as 512K x 32, 1M x 16 or 2M x 8 FV = FLASH (3.3V) PUMA 68 = 68 pin `J' Leaded PLCC
Technology Package
Note : Although this data is believed to be accurate the information contained herein is not intended to and does not create any warranty of merchantibility or fitness for a particular purpose. Our products are subject to a constant process of development. Data may be changed without notice. Products are not authorised for use as critical components in life support devices without the express written approval of a company director.
PAGE 4
http://www.mosaicsemi.com/
Issue 5.0 April 2001
Customer Guidelines
Visual Inspection Standard
All devices inspected to ANSI/J-STD-001B Class 2 standard
Moisture Sensitivity
Devices are moisture sensitive. Shelf Life in Sealed Bag 12 months at <40OC and <90% relative humidity (RH). After this bag has been opened, devices that will be subjected to infrared reflow, vapour phase reflow, or equivalent processing (peak package body temp 220OC) must be : A : Mounted within 72 Hours at factory conditions of <30OC/60% RH OR B : Stored at <20% RH If these conditions are not met or indicator card is >20% when read at 23OC +/-5% devices require baking as specified below. If baking is required, devices may be baked for :A : 24 hours at 125OC +/-5% for high temperature device containers OR B : 192 hours at 40OC +5OC/-0OC and <5% RH for low temperature device containers.
Packaging Standard
Devices packaged in dry nitrogen, JED-STD-020. Packaged in trays as standard. Tape and reel available for shipment quantities exceeding 200pcs upon request.
Soldering Recomendations
IR/Convection Ramp Rate Temp. exceeding 183OC Peak Temperature Time within 5OC of peak Ramp down Ramp up rate Peak Temperature Time within 5OC of peak Ramp down 6OC/sec max. 150 secs. max. 225OC 20 secs max. 6OC/sec max. 6OC/sec max. 215 - 219OC 60 secs max. 6OC/sec max.
Vapour Phase -
The above conditions must not be exceeded.
Note : The above recommendations are based on standard industry practice. Failure to comply with the above recommendations invalidates product warranty.
PAGE 5
Issue 5.0 April 2001


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